1. Field of the Invention
The present invention relates to a flexible printed circuit board with various SMT (surface mount technology) chips mounted on the surface thereof, in particular, to such a multi-layer flexible printed circuit board of high bonding reliability and to a method for fabricating it.
2. Description of the Related Art
The recent tendency in the art toward down-sized, lightweight and multi-function electronic appliances brings about further increase in the circuit density of the flexible printed circuit board (hereinafter this may be abbreviated to FPC) to be used in such appliances. There is a limit of micropatterning technology to the increase in the circuit density of FPC. Accordingly, multi-layer FPC is now specifically noticed, which comprises multiple circuit layers laminated and in which the multiple circuit layers are three-dimensionally interconnected through insulating layers that are interconnectably disposed between them, to thereby increase the circuit density of the thus-constructed multi-layer FPC.
Heretofore, multi-layer FPC is fabricated by forming through-holes in an insulating layer of polyimide film and plating the sidewall face of the through-holes with copper to thereby three-dimensionally interconnect the circuit layers on both faces of the insulating layer (for example, see JP-A 5-175636 (page 2, FIG. 2)). The interlayer connecting method is referred to as a plated through-hole method, and it is most popular for interconnection in multi-layer FPC. The fabrication method comprises two significant steps: one is for electroless-plating the wall face of insulating through-holes to make them conductive, and the other is for electrolytic-plating it with a thick layer of copper. One characteristic advantage of the method is that, since the thermal expansion coefficient of the copper plate film inside the through-holes is nearly the same as that of the insulating layer with the through-holes formed therein, the bonding reliability to heat of the devices fabricated is good.
However, the thick plating with copper shall increase not only the thickness of the copper plate film inside the through-holes but also the thickness of the copper foil to be a circuit layer, therefore making it difficult to etch the foil for micropatterning to give the intended circuit layer. There are still other problems in that the process of the method is long and the productivity thereof is low.
To solve the problems with the interconnection technology, another method is proposed, which comprises printing the inner wall face of through-holes with a solder paste and fusing and solidifying the paste thereon (for example, see JP-A 7-176847 (pages 2-4, FIG. 2)). The method is characterized in that its process is simple as compared with the plated through-hole method mentioned above and therefore its productivity is high, and, in addition, since the circuit layers are interconnected after they are formed, the process of the method does not have any influence on the thickness of the copper foil and therefore does not interfere with the micropatterning of the circuit layers.
In the method, however, the thermal expansion coefficient of solder is larger than that of the insulating layer, and when heated, the solder in the through-holes may expand more than the insulating layer and there may be a risk that the bonding interface between the circuit layer on the insulating layer and the solder may peel off. To that effect, the soldering method is problematic in that the bonding reliability to heat of the devices fabricated therein is not good.
As mentioned above, the plated through-hole method in the related art for interlayer connection in multi-layer FPC is still problematic in point of the micropatterning of the circuit layers and of the productivity, though the bonding reliability of the devices fabricated therein is good. On the other hand, the soldering method is also problematic in point of the bonding reliability of the devices fabricated thereon, though it solves the problems with the former method in point of the micropatterning of the circuit layers and of the productivity.
Accordingly, in the art of interlayer connection in multi-layer FPC, a method of fabricating multi-layer FPC is desired that satisfies both good bonding reliability and good micropatterning of circuit layers and enables good productivity.